Show HN: Bringing in usb3 to raspberry pico [open hardware]

An open hardware board (KiCad) that pairs a Raspberry Pi RP2350B with a WCH CH569W. The RP2350B generates high-speed data and the CH569 streams it to a host over USB 3.0.

Status: v1.0 (tag v1.0). Schematic complete, PCB fully routed (4-layer, 50×70 mm, rounded corners, parts on both sides; 0 unconnected, 0 DRC errors) and JLCPCB production files generated. Before ordering: USB pairs as coupled pairs, silkscreen cleanup, impedance check (see docs/layout.md). First firmware for both chips in firmware/ (builds, not run on hardware yet). Schematic PDF. Documentation site: https://kelu124.github.io/rp569/ (GitHub Pages from docs/).

File Use

hardware/jlcpcb/rp569-gerbers.zip PCB order (gerbers + drill)

hardware/jlcpcb/rp569-bom.csv Assembly BOM with LCSC part numbers

hardware/jlcpcb/rp569-cpl.csv Assembly placement (CPL)

Board to fabricate: hardware/rp569-routed.kicad_pcb. Regenerate the files with python3 hardware/gen/gen_fab.py. Two parts are not stocked by JLCPCB and must be consigned: CH569W and the Amphenol GSB343K33HR USB3 connector (docs/bom.md).

Block RP2350B CH569W

USB USB 2.0 on USB-C (firmware, debug, test control) USB 3.0 SuperSpeed, Micro-B connector

Storage QSPI flash SD card on the eMMC/SD controller

User I/O RGB LED, 2 user buttons RGB LED, 2 user buttons

Boot BOOTSEL + RUN buttons BOOT button + jumper (force the USB bootloader on a blank chip)

Breakout I2C header for extra devices I2C header (bit-banged GPIO)

Logic analyser: 8 input pins on the RP2350B are sampled by PIO and streamed over the parallel bus to the CH569, then to the host over USB 3.

Power: the RP2350B runs from either USB connector through a TI TPS2121 power mux, so neither back-feeds the other. The CH569 is powered from its own USB3 VBUS through a load switch that the RP2350B controls, so it can be power-cycled and forced into its bootloader during automated tests.